common clk framework · Maintained

Maintainers

• M Michael Turquette <mturquette@baylibre.com>
• M Stephen Boyd <sboyd@kernel.org>
• R Brian Masney <bmasney@redhat.com>

Paths

• F Documentation/devicetree/bindings/clock/
• F drivers/clk/
• F include/dt-bindings/clock/
• F include/linux/clk-pr*
• F include/linux/clk/
• F include/linux/of_clk.h
• F scripts/gdb/linux/clk.py
• F rust/helpers/clk.c
• F rust/kernel/clk.rs
• X drivers/clk/clkdev.c

Last 30 days

Active reviewers (last 30 days)

• Brian Masney <bmasney@redhat.com>
  2 attestations (2 Reviewed-by) · last on 2026-06-04
• Krzysztof Kozlowski <hidden>
  1 attestation (1 Reviewed-by) · last on 2026-06-04

Recent patches

Most-recent 30 patches in this subsystem on linux-mips (capped at 30), ordered by date desc.

• COOLING13d [PATCH v8 9/9] clk: eyeq: Add EyeQ7H compatibles
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d [PATCH v8 8/9] clk: eyeq: Drop PLL, dividers, and fixed factors structs
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d [PATCH v8 7/9] clk: eyeq: Convert clocks declaration to eqc_clock
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d [PATCH v8 6/9] clk: eyeq: Introduce a generic clock type
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d [PATCH v8 5/9] clk: eyeq: Prefix the PLL registers with the PLL type
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d REVIEWED: 1 (1M) [PATCH v8 4/9] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d REVIEWED: 1 (1M) [PATCH v8 3/9] clk: fixed-factor: Rework initialization with parent clocks
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COOLING13d REVIEWED: 1 (0M) [PATCH v8 1/9] dt-bindings: soc: mobileye: Add EyeQ7H OLB
  2026-06-04 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 9/9] clk: eyeq: Add EyeQ7H compatibles
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 8/9] clk: eyeq: Drop PLL, dividers, and fixed factors structs
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 7/9] clk: eyeq: Convert clocks declaration to eqc_clock
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 6/9] clk: eyeq: Introduce a generic clock type
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 5/9] clk: eyeq: Prefix the PLL registers with the PLL type
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d REVIEWED: 1 (1M) [PATCH v7 4/9] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d [PATCH v7 3/9] clk: fixed-factor: Rework initialization with parent clocks
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD30d REVIEWED: 1 (0M) [PATCH v7 1/9] dt-bindings: soc: mobileye: Add EyeQ7H OLB
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d [PATCH v6 9/9] clk: eyeq: Add EyeQ7H compatibles
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d [PATCH v6 8/9] clk: eyeq: Drop PLL, dividers, and fixed factors structs
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d [PATCH v6 7/9] clk: eyeq: Convert clocks declaration to eqc_clock
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d [PATCH v6 6/9] clk: eyeq: Introduce a generic clock type
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d [PATCH v6 5/9] clk: eyeq: Prefix the PLL registers with the PLL type
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d REVIEWED: 1 (1M) [PATCH v6 4/9] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d REVIEWED: 1 (1M) [PATCH v6 3/9] clk: fixed-factor: Rework initialization with parent clocks
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• COLD43d REVIEWED: 1 (0M) [PATCH v6 1/9] dt-bindings: soc: mobileye: Add EyeQ7H OLB
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com>
• STALE72d [PATCH v2] clk: eyeq: fix memory leak in eqc_auxdev_create() error path
  2026-04-12 · Guangshuo Li <hidden>
• STALE92d [PATCH v5 09/10] clk: eyeq: Add EyeQ7H compatibles
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE92d [PATCH v5 08/10] clk: eyeq: Drop PLL, dividers, and fixed factors structs
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE92d [PATCH v5 07/10] clk: eyeq: Convert clocks declaration to eqc_clock
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE92d [PATCH v5 06/10] clk: eyeq: Introduce a generic clock type
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE92d [PATCH v5 05/10] clk: eyeq: Prefix the PLL registers with the PLL type
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com>

Needs attention (review trailers in, no pickup)

Patches with review trailers that haven't landed in mainline and haven't been Acked by a maintainer. Oldest first.

• STALE171d REVIEWED: 5 (5M) [PATCH v5 4/7] clk: eyeq: add EyeQ5 children auxiliary device for generic PHYs
  2025-12-15 · Théo Lebrun <theo.lebrun@bootlin.com> · 1 Reviewed-by
• STALE118d REVIEWED: 5 (5M) [PATCH v6 4/8] clk: eyeq: use the auxiliary device creation helper
  2026-01-27 · Théo Lebrun <theo.lebrun@bootlin.com> · 1 Reviewed-by
• STALE118d REVIEWED: 5 (5M) [PATCH v6 5/8] clk: eyeq: add EyeQ5 children auxiliary device for generic PHYs
  2026-01-27 · Théo Lebrun <theo.lebrun@bootlin.com> · 1 Reviewed-by
• COLD57d REVIEWED: 5 (5M) [PATCH v7 1/3] clk: eyeq: use the auxiliary device creation helper
  2026-02-25 · Théo Lebrun <theo.lebrun@bootlin.com> · 1 Reviewed-by
• COLD57d REVIEWED: 5 (5M) [PATCH v7 2/3] clk: eyeq: add EyeQ5 children auxiliary device for generic PHYs
  2026-02-25 · Théo Lebrun <theo.lebrun@bootlin.com> · 1 Reviewed-by
• STALE92d REVIEWED: 1 (1M) [PATCH v5 03/10] clk: fixed-factor: Rework initialization with parent clocks
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com> · 1 Reviewed-by
• STALE92d REVIEWED: 1 (1M) [PATCH v5 04/10] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2026-03-17 · Benoît Monin <benoit.monin@bootlin.com> · 1 Reviewed-by
• COLD43d REVIEWED: 1 (1M) [PATCH v6 3/9] clk: fixed-factor: Rework initialization with parent clocks
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com> · 1 Reviewed-by
• COLD43d REVIEWED: 1 (1M) [PATCH v6 4/9] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2026-05-12 · Benoît Monin <benoit.monin@bootlin.com> · 1 Reviewed-by
• COLD30d REVIEWED: 1 (0M) [PATCH v7 1/9] dt-bindings: soc: mobileye: Add EyeQ7H OLB
  2026-05-22 · Benoît Monin <benoit.monin@bootlin.com> · 1 Reviewed-by

Quiet for 30+ days

Patches with no review trailers and no replies. Either the author is heads-down elsewhere or these slipped through. Oldest first.

• STALE174d [PATCH 07/13] clk: eyeq: Skip post-divisor when computing PLL frequency
  2025-12-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE174d [PATCH 08/13] clk: eyeq: Adjust PLL accuracy computation
  2025-12-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE174d [PATCH 09/13] clk: eyeq: Add Mobileye EyeQ6Lplus OLB
  2025-12-17 · Benoît Monin <benoit.monin@bootlin.com>
• STALE168d [PATCH v2 07/13] clk: eyeq: Skip post-divisor when computing PLL frequency
  2025-12-23 · Benoît Monin <benoit.monin@bootlin.com>
• STALE168d [PATCH v2 08/13] clk: eyeq: Adjust PLL accuracy computation
  2025-12-23 · Benoît Monin <benoit.monin@bootlin.com>
• STALE168d [PATCH v2 09/13] clk: eyeq: Add Mobileye EyeQ6Lplus OLB
  2025-12-23 · Benoît Monin <benoit.monin@bootlin.com>
• STALE180d [PATCH v2 03/10] clk: fixed-factor: Rework initialization with parent clocks
  2025-12-24 · Benoît Monin <benoit.monin@bootlin.com>
• STALE180d [PATCH v2 04/10] clk: fixed-factor: Export __clk_hw_register_fixed_factor()
  2025-12-24 · Benoît Monin <benoit.monin@bootlin.com>
• STALE180d [PATCH v2 05/10] clk: eyeq: Prefix the PLL registers with the PLL type
  2025-12-24 · Benoît Monin <benoit.monin@bootlin.com>
• STALE180d [PATCH v2 06/10] clk: eyeq: Introduce a generic clock type
  2025-12-24 · Benoît Monin <benoit.monin@bootlin.com>